Gilad Krupsky ReismanXilinx AXI Chip2Chip for Multi-FPGA designThe AXI Chip2Chip IP from Xilinx allows the designer to connect two or more FPGAs using an AXI bus implemented using tranceivers running…4 min read·Nov 21, 2020----
Gilad Krupsky ReismanXilinx MPSoC PS DDR Performance MonitorIf you are using Xilinx MPSoC devices, I think you need to know about the PS DDR AXI Performance Monitor. While this is not a new block, I…7 min read·Nov 16, 2020--1--1
Gilad Krupsky ReismanRDMA from Xilinx FPGA to Nvidia GPUs — Part 1I have recently had the need to design a system concept able to process real-time video at a very high frame rate on a desktop PC.6 min read·Nov 8, 2020--2--2